| 摘要 |
PURPOSE:To simplify manufacturing processes and reduce a difference in level on the surface of a cell by a method wherein a control gate and floating gate which adjoins the control gate with an insulating film between are arranged along the direction crossing the separating part between a source region and a drain region and a charge eliminating electrode overlaps the floating gate with another insulating film between. CONSTITUTION:After a cell forming region CA is exposed on the surface of a p<-> type silicon substrate 1, a gate SiO2 film 4 is formed and a polycrystalline silicon control gate electrode 5 is formed. After a gate SiO2 film 6 is formed, a polycrystalline silicon layer PB is formed and etched by anisotropic etching to form side walls 107a and 107b. Then one (107b) of the side walls 107a and 107b is removed to form a floating gate electrode 7. Then a gate SiO2 film 10 is formed on the exposed surfaces of the electrodes 5 and 7 and N<+> type source and drain regions 8 and 9 are formed by using the electrodes 5 and 7 as a mask. A polycrystalline silicon layer is formed and a gate electrode 11, which crosses above the electrode 5 with a right angle and overlaps the electrode 7, is formed on a field SiO2 film 2.
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