发明名称 SIMULATION EQUIPMENT FOR SERIAL TRANSMISSION
摘要 PURPOSE:To attain high speed continuous transmission of a data having an optional bit length by extracting a parallel data directly from a data memory without intervention of muP and providing a memory storing bit length information of transmission data without intervention of a microprocessor. CONSTITUTION:A data memory 5 stores a transmission data DT1 for serial transmission line output at each storage area. A most significant bit location memory 6 stores a bit location data DT2 representing the effective bit length of the transmission data DT1 at each address in the data memory 5. A selector 7 inputs a bit location count 11a and selects one by one bit sequentially and serially from the parallel transmission data DT1 outputted from the data memory 5. A driver 9 applies level conversion to the output of the selector 7 and sends the result to a serial transmission line SL as a driver output 9a. The most significant bit location memory 6 is provided in this way to send the data of an optional bit length from the storage area at each address in the data memory 5 and this system is useful for the simulation of a transmission protocol whose bit length is not fixed.
申请公布号 JPS62136950(A) 申请公布日期 1987.06.19
申请号 JP19850277453 申请日期 1985.12.10
申请人 FUJI ELECTRIC CO LTD 发明人 ASANUMA KENJI;FUKUHARA MASANORI
分类号 H04L29/14;H04L1/24;H04L13/00;H04L25/02;H04L25/40 主分类号 H04L29/14
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