发明名称 DEMODULATION CIRCUIT
摘要 PURPOSE:To demodulate a digital signal sent in a short burst in a preamble section at high speed and to lower a code error rate by switching the output of a delay detection circuit and a synchronizing detection circuit in a proper timing. CONSTITUTION:Before the data M2 of a differential PSK signal is inputted, a switch control circuit 7 throws a switch 6 at first to select a delay detection circuit 4. When the data M2 is inputted, the delay detection circuit 4 responds to the data at high speed and demodulates the data M2 and outputs a demodulation signal from an output terminal 9 via the switch 6. The data M2 is inputted also to a synchronizing detection circuit 3 at the same time and a synchronizing detection circuit 3 recovers the carrier. After the stable circuit operation, the switch 6 is switched to the synchronizing detection circuit 3 from the delay detection circuit 4. Thus, the synchronizing detection circuit 3 having an theroretically excellent code error rate characteristic is utilized to attain the demodulation with very stable and low code error rate.
申请公布号 JPS62135047(A) 申请公布日期 1987.06.18
申请号 JP19850274911 申请日期 1985.12.09
申请人 HITACHI LTD 发明人 SHIROSUGI TAKATOSHI;NODA TSUTOMU;TANAKA HIROMICHI;AMADA NOBUTAKA
分类号 H04L27/227;H04L27/22 主分类号 H04L27/227
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