发明名称 INSTRUCTION PROCESSING SYSTEM
摘要 PURPOSE:To increase an executing speed of a program by storing a degree of importance designated in advance in a resister, and comparing a degree of importance of an instruction with the degree of importance of said resister whenever the instruction is processed. CONSTITUTION:An instruction stored in a storage device 1 is read out succesively and executed in accordance with a vlaue set to a program counter 6. At the same time, a degree of importance given to each instruction is read out of its storage device 3, and compared with a degree of importance stored in a register 4 by a comparing circuit 5. For instance, in case the degree of importance of the register 4 is ''3'' and an instruction x1 is ''5'', the comparing circuit 5 outputs a signal in order that a multiplexer 7 outputs an address value from an adding circuit 8. Also, in case a degree of importance of an instruction x2 is ''2'' and low, the next head address is stored in the program counter 6 from an address storage device 2 so that said instruction becomes a state detached from a program, and an instruction x3 stored in the storage device 1 is read out.
申请公布号 JPS6072029(A) 申请公布日期 1985.04.24
申请号 JP19830181115 申请日期 1983.09.29
申请人 FUJITSU KK 发明人 SHINOKI TAKESHI
分类号 G06F9/30;G06F9/32;G06F11/28 主分类号 G06F9/30
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