| 摘要 |
PURPOSE:To assemble plural pieces of CM and to make a large capacity of the CM by providing a directory and a data memory to control the block held in the CM in an one chip cache memory (CM). CONSTITUTION:When a memory reading signal is impressed from a processor P to a control circuit 7, the circuit 7 sets a memory address MA of a processor address terminal PA to an address register AR3, a chip selecting table 8 is read by the address and a reading value is set to a chip selecting flip-flop FF9. Simultaneously with this, by the value of a block address part BA of an AR3, a directory 1 is retrieved. When coincidence is detected, the directory 1 is read, the tag value of respective read compartments and the value of the address tag part of BA are compared, which compartment tag is effective and when the value is coincident, the block including the address, in which the access request is executed, exists on an own CM, and to inform other CM chip of this, a value '1' is impressed to a coincidence detecting terminal FS. A data memory 2 is read by the address, etc., and accommodated to a data register 4.
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