| 摘要 |
PURPOSE:To generate plural pulses per one input pulse by constituting the titled circuit by the 1st and 2nd pulse delay circuits, a pulse generating means and an OR circuit. CONSTITUTION:A negative pulse (a) incoming to an input terminal 1 is converted into a positive pulse (b) by an inverter 2 and fed to a monostable multivibrator 3 and a NOR circuit 4. A negative pulse (c) is extracted from the monostable multivibrator 3 and impressed to the circuit 4, then an output signal of the circuit 4 is a pulse (d) delayed from the pulse (a). A positive pulse (e) is outputted from a Q output of the monostable multivibrator 5 and fed to a NOR circuit 6, and an opposite polarity of pulse (f) is outputted from a Q output and fed to a monostable multivibrator 7. The monostable multivibrator 7 is triggered at the trailing edge of the pulse (f) and outputs a pulse (g) of opposite polarity. A monostable multivibrator 8 is triggered at the trailing of the pulse (g), generates a positive pulse (h) to the circuit 6. The pulses (e, h) are NORed by the circuit 6 and a combined pulse (i) is obtained.
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