发明名称 ERROR CORRECTION SYSTEM
摘要 PURPOSE:To suppress deterioration in inspection ability due to an increase in error rate by considering that all symbols can not be corrected when the number of flags added during the 1st decoding exceeds a specific number. CONSTITUTION:When an error is corrected, a received signal is inputted firstly and a syndrome generating circuit 1 generates a syndrome. In the 1st decoding, the error detection of a reed-solomon code and the error is detected. In the 2nd decoding, the number of flags added in the 1st decoding is counted by a counter 2, and the result is compared by a comparing circuit 5 with the specific number inputted from a P-ROM 11. When the number of flags is smaller than the specific number, decoding is performed by a program, the error position and error pattern are found, and wrong data is corrected. When the number of flags is larger, on the other hand, an incorrectable flag is outputted from a data input output terminal 20 for all symbols. Consequently, the detection ability when the error rate is low is improved.
申请公布号 JPS62134867(A) 申请公布日期 1987.06.17
申请号 JP19850274914 申请日期 1985.12.09
申请人 HITACHI LTD 发明人 HATANAKA YUJI;OKAMOTO HIROO
分类号 G11B20/18 主分类号 G11B20/18
代理机构 代理人
主权项
地址