发明名称 AUTOMATIC WIRING PATH DETERMINING METHOD
摘要 PURPOSE:To execute the wiring of nets of different voltage levels on the same layer, and to curtail the number of layers of a wiring board, by determining a wiring inhibited area by the existing wiring and avoiding the wiring to this area, so that a wiring of the succeeding different kind signal net does not become adjacent within a prescribed interval to the existing wiring. CONSTITUTION:Two kinds of nets of different voltage levels are mixed on a wiring layer, and as for a wiring pattern 5 of a voltage level I, the wiring is executed prior to a wiring pattern 6 of a voltage level II, and at the time of wiring of the net of the voltage level II, a wiring inhibited area is inputted as a wiring inhibited area data being a part of an oblique line in accordance with a designation from the outside. The wiring pattern 6 of the voltage level II is brought to wiring by avoiding the wiring inhibited area, therefore, as a result, the pattern 5 of the voltage level I and the wiring pattern 6 of the voltage level II can always be brought to wiring by keeping an interval exceeding a prescribed value alpha. In this way, a problem of a crosstalk is dissolved, the nets of different voltage levels are mixed on the same layer, and the number of layers of a wiring board can be curtailed.
申请公布号 JPS62134769(A) 申请公布日期 1987.06.17
申请号 JP19850275435 申请日期 1985.12.06
申请人 NEC CORP 发明人 KUWABARA NORIO
分类号 H05K3/00;G06F17/50 主分类号 H05K3/00
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