发明名称 BUS COUPLING ADJUSTING CIRCUIT
摘要 PURPOSE:To eliminate a load of a program by providing a function for determining a priority on a bus coupling adjusting circuit, making a request person of a lower priority turn off an output to this own local bus, when a request of a mutual use has collided, and processing a request of a higher priority first. CONSTITUTION:When the first processor 21 has tried to operate a local memory 24 of the second processor 22, when an operation request of the second from the first processor 21 is received, a bus coupling adjusting circuit 30 outputs a request for using a bus to a bus control part 28 of the second processor 22 side. Also, when an operation request of the first local memory 23 is generated from the second processor 22, the bus coupling adjusting circuit 30 receives the requests from both the processors 21, 22, recognizes a request of a higher priority degree by a decision of an internal priority circuit, and makes a request person having a lower priority degree output an 'output OFF request' to his own local bus. The request person who has received the 'output OFF request' turns off an output to his own local bus, and holds the present state as it is.
申请公布号 JPS62134746(A) 申请公布日期 1987.06.17
申请号 JP19850274355 申请日期 1985.12.07
申请人 NEC CORP 发明人 UEDA CHIAKI
分类号 G06F15/16;G06F9/52;G06F13/26;G06F13/362;G06F15/177 主分类号 G06F15/16
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