| 发明名称 |
MIRROR CURRENT COMPENSATING CIRCUIT |
| 摘要 |
A TTL inverting output circuit (50) which uses the collector (65) of a parallel phase splitter transistor (Q11) where the voltage changes in phase with the circuit output signal Io to control an active circuit (70) which diverts charge from the base (23) of the output pull-down transistor (Q3). |
| 申请公布号 |
JPS62133818(A) |
申请公布日期 |
1987.06.17 |
| 申请号 |
JP19860171478 |
申请日期 |
1986.07.21 |
| 申请人 |
MONOLITHIC MEMORIES INC |
发明人 |
DENESHIYU TABUAANA;SHINGU WAI UONGU |
| 分类号 |
H03F3/20;H03F3/30;H03K17/04;H03K17/60;H03K19/013;H03K19/088 |
主分类号 |
H03F3/20 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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