发明名称 |
Method and apparatus for minimizing digital-to-analog converter correction trims |
摘要 |
A method of calibrating a feed forward, DAC post-correction system. The method includes fitting the Walsh co-efficiencts of a DAC transfer function to a straight line in the log domain. The deviation of these terms in the log domain is utilized to compute Walsh correction terms for use in the post correction system.
|
申请公布号 |
US4673917(A) |
申请公布日期 |
1987.06.16 |
申请号 |
US19840631958 |
申请日期 |
1984.07.18 |
申请人 |
FAIRCHILD SEMICONDUCTOR CORPORATION |
发明人 |
URSCHEL, WILLIAM J.;SLOANE, EDWIN A. |
分类号 |
H03M1/74;H03M1/00;(IPC1-7):H03M1/10 |
主分类号 |
H03M1/74 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|