发明名称 REFERENCE SIGNAL FORMING CIRCUIT OF SYNCHRONOUS PWM INVERTER
摘要 PURPOSE:To simply and inexpensively form a construction of a reference signal forming circuit of a synchronous PWM inverter by forming a reference signal of a PWM inverter with a purely digital construction using a programmable divider and a PLL circuit. CONSTITUTION:Dividing frequency of programmable dividers 10, 20, 30, 40 are controlled by a microcomputer 100. A PLL circuit 50 operates as a frequency multiplier. The frequency of the reference clock of the microcomputer 100 is divided by dividers 10, 20, and applied as a frequency reference to the PLL circuit 50. The output of the PLL circuit 50 is divided by the divider 30 to generate a PWM reference signal. The PWM reference signal is divided in frequency by the divider 40, and applied as a feedback input to the PLL circuit 50.
申请公布号 JPS6074973(A) 申请公布日期 1985.04.27
申请号 JP19830181857 申请日期 1983.09.28
申请人 MITSUBISHI DENKI KK 发明人 MASUDA HIROYUKI
分类号 H02M1/08;H02M7/48 主分类号 H02M1/08
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