| 摘要 |
PURPOSE:To realize an economization caused by a common use, the simplification of a control, and the simplification at the time of an extension, by providing not only a separate DMA address circuit corresponding to transmission and reception, but also a common DMA additional address circuit, and setting an address from a line control part. CONSTITUTION:When a line unit 1 receives a data from a receiving circuit 11, a DMA control circuit 2 and a DMA additional address circuit 4 for reception execute the DMA transfer of the lower bit of a DMA transfer address in a separate address circuit 21 for the reception, and the upper bit of the DMA transfer address, respectively. In case of transmitting an accumulated data from a main memory device 32, a control part 31 sets the lower bit of a transmitting data store address in the main memory device 32, the upper bit, and the number of transfer bytes to a separate DMA address circuit 22 for the communication, a DMA additional address circuit 5 for the transmission and a transfer byte counter 24 for the transmission, respectively.
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