发明名称 ACCESS CONTROL SYSTEM FOR DUAL PORT MEMORY
摘要 PURPOSE:To eliminate an access competition by determining an access right to a dual port memory according to the state of a flip-flop. CONSTITUTION:The flip-flop 34 is set by a CPU 11, and reset by a CPU 21. When it is confirmed that the state Q of the flip-flop 34 becomes L, by a state detecting circuit 37, and it is known that the access right to the dual port memory is obtained, the CPU 11 writes a message to the CPU 21, in the dual port memory. The CPU 21 which knows that the terminal Q becomes L, by a state detecting circuit 38, and secures the access right executes the read processing of a message from the CPU 11, and writes a result in the dual port memory.
申请公布号 JPS62133560(A) 申请公布日期 1987.06.16
申请号 JP19850274152 申请日期 1985.12.05
申请人 SANYO ELECTRIC CO LTD 发明人 KATAYAMA RITSU
分类号 G06F15/167;G06F12/00;G06F13/18;G06F15/16 主分类号 G06F15/167
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