FRAME DATA SAMPLING SYNCHRONIZATION ACQUISITION EQUIPMENT

摘要

PURPOSE:To improve the utilizing efficiency of lines by constituting the titled equipment of a frame synchronizing circuit and a multiplexer and extracting bit synchronization between data terminals by means of a clock having a frequency which is a half the bit rate between the terminals. CONSTITUTION:The frame data sampling synchronization acquisition equipment consists of the frame synchronizing circuit 4 and the multiplexer 5 and extracts bit synchronization between data terminals by means of a clock having a frequency which is a half the bit rate between the terminals. The data read timing in a frame is generated from the synchronizing clock having the frequency which is a half the transmission bit rate and the read timing of the head bit of frame data to be sent is adjusted automatically depending on the two state to the synchronizing clock by using small-sized hardware. Thus, the line utilizing efficiency is improved and the hardware for correcting the timing at system reset, loss of frame or reacquisition is omitted.