发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To form an integrated circuit simply, by forming a region by ion implantation, then forming a thick oxide film, implanting ions, and simultaneously forming the low resistance source and drain regions of a P-channel MOS transistor and the high resistance base region of an NPN transistor. CONSTITUTION:Antimony or arsenic is selectively doped in a P-type single crystal silicon substrate 1, and N-type embedded regions 2 and 21 are formed. Then boron is selectively doped and P-type embedded regions 3 and 21 are formed. Boron is selectively doped in the surface part of an N-type epitaxial layer, and an isolating region 5 is formed on the P-type embedded region 3. A P-type well region 6 is formed on the P-type embedded region 31. On the surface of regions B and C, a thick silicon oxide film 7 is formed. A thin silicon oxide film 8 is formed. A gate electrode 9 is formed. Boron ions are implanted in the specified region. A base region 12 is formed in a region A. A source region 10 and a drain region 101 of a P-channel MOS transistor are formed in the region B. A guard band region 11 is formed between the regions B and C.
申请公布号 JPS62131558(A) 申请公布日期 1987.06.13
申请号 JP19850271863 申请日期 1985.12.03
申请人 MATSUSHITA ELECTRONICS CORP 发明人 YAMAOKA TORU;UCHIDA HIROBUMI
分类号 H01L21/76;H01L21/8249;H01L27/06 主分类号 H01L21/76
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