| 摘要 |
PURPOSE:To reduce the nonlinear distortion by supplying a bias to the 1st FET drain so as to the same DC operating condition to the 1st and 2nd FETs while a source follower output is amplified double and feeding back the result to the 1st FET drain. CONSTITUTION:A current ¦-VCC¦/R3 flows to a resistor R3 at a point of time when an input signal voltage VIN=0V and the current flows from an output of an amplitude amplifier 3 through a resistor R1, resulting that an output voltage of the amplifier 3 is +5V, which is given as a drain voltage of the 1st FET Q1. When the input signal voltage VIN rises to +1V, since an output signal voltage VOUT rises to +1V, the output potential of the amplifier 3 rises by 2V being twice into +7V. In this case, a drain-gate voltage VDG of the 1st FET Q1 is 6V and the drain-gate voltage VDG of the 2nd FET Q2 is 6V, then they are equal. Since the potential between the input and output signals is kept always to 0V, nonlinear distortion is reduced.
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