发明名称 INSTRUCTION BUFFER STACK SYSTEM
摘要 PURPOSE:To reduce the number of times of the read of an instruction in the return time of a subroutine without complicating a control by providing an instruction buffer stack constituted with plural number of instruction buffers. CONSTITUTION:A displacement instruction counter 7 indicates the next instruction to the instruction in process at the address of a word within an instruction buffer IB0. When a call instruction at a main side is executed, the content of the displacement instruction counter 7 becomes (n+1) because the call instruction is present at the n-th address. A fact that the call instruction is executed is informed to a subroutine level register 6 and a displacement instruction counter stack 8, and the subroutine level register 6 adds by one on its content and stores a subroutine level '1'. The subroutine level '1' is transferred to an instruction pre-fetch selector 4 and an instruction fetch selector 5 by a subroutine level indication signal 9, and both selectors 4 and 5 select an active instruction buffer IB1.
申请公布号 JPS62128338(A) 申请公布日期 1987.06.10
申请号 JP19850268834 申请日期 1985.11.29
申请人 NEC CORP 发明人 FUJITA TETSUYA
分类号 G06F9/42;G06F9/38;G06F9/40 主分类号 G06F9/42
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