发明名称 FLOATING POINT ARITHMETIC SYSTEM
摘要 PURPOSE:To hold the number of effective digits resulted from a floating point multiplication/division in its result without changing the existing expression form of the number of floating points and the main part of an arithmetic mechanism by normalizing the numbers of the first and the second floating points which are the objects of a multiplication and a division with a normalizing means. CONSTITUTION:An input part 12 outputs the numbers of floating points (x) and (y) to a normalizing part 13 when a flag 11 is turned on. The normalizing part 13, when it completes the normalization process of the numbers of the floating points (x) and (y), outputs them to an arithmetic part 14, and also, loads the numbers of digit shifts (a) and (b) accompanied by the normalization at a register 15. The arithmetic part 14 performs a designated multiplication or division between an X and a Y, and finds a normalized arithmetic result Z, and loads it at a register 16, and simultaneously informs it to a decision part 17. The decision part 17 compares the sizes of the numbers of digit shifts (a) and (b) held at the register 15, and finds a larger number of digit shifts max(a,b), and when it is (a)=(b), it uses either of them. A digit shift part 18 performs a digit shift of max(a,b) share against the normalized arithmetic result Z.
申请公布号 JPS62128330(A) 申请公布日期 1987.06.10
申请号 JP19850269632 申请日期 1985.11.30
申请人 TOSHIBA CORP 发明人 ICHISE ATSUSHI
分类号 G06F7/00;G06F7/76 主分类号 G06F7/00
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