| 摘要 |
PURPOSE:To minimize the size of cells occupying on a bulk according to logics, and to improve efficiency on the use of semiconductor elements by arranging fundamental units constituted of the semiconductor elements in minimum number or less required for logical constitution having a minimum function to the bulk in an array manner. CONSTITUTION:Logics are realized in a region surrounded by a solid line in a layout conceptual figure for an LSI actualized by a system, in which fundamental units 10 are connected, and the region functions as a section as a cell region, and broken lines represent the boundaries of the fundamental units 10. Gnm is realized on a No.N array, and shows a No.m logic cell from the left on the array. Since said logic cells take different size occupying on a bulk in response to logical functions, the number of the logic cells differs at every array even when the arrays are all used. Accordingly, the size of the logic cells occupying on the bulk can be minimized according to the logics, thus improving efficiency on the use of elements, then preventing the deterioration of speed performance.
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