发明名称 Phase adjustment circuit for scanning video display
摘要 Phase adjustment circuit for controlling horizontal scanning of a scanning video display is provided. Horizontal sync pulses are received having leading edges to be used for determining the occurrence of the horizontal retrace of a scanning electron beam. A manual phase adjustment control is provided by effectively comparing a controllable adjustable delayed leading edge, provided in response to the horizontal sync signal leading edge, with the trailing edge of a retrace pulse, having an effective width W, provided during the retrace cycle of the scanning electron beam. An adjustable monostable circuit delays the horizontal sync signal leading edge by a delay time D1, and this provides one input to a phase locked loop. Another input to the phase locked loop is provided by the trailing edge of the retrace pulse. By phase locking these two inputs, phase adjustment of the occurrence of the retrace pulse is possible so as to implement a phase adjustment phi equal to the adjustable delay D1 minus the retrace pulse width W. This permits providing a manually adjustable negative or positive phase delay for the occurrence of the retrace pulse with respect to the horizontal sync signal, and thus enables the present invention to accommodate various different video formats where video may commence either prior to, coincident with or after the occurrence of the horizontal sync signal leading edge.
申请公布号 US4672448(A) 申请公布日期 1987.06.09
申请号 US19850794220 申请日期 1985.10.31
申请人 MOTOROLA, INC. 发明人 GIOIOSA, ANTHONY V.
分类号 H04N5/12;(IPC1-7):H04N5/04 主分类号 H04N5/12
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