Semiconductor device having matched-timing dynamic circuit and static circuit

摘要

A semiconductor device having a dynamic circuit and a static circuit, wherein a clock signal, in synchronization with the operation of the static circuit, initiates the operation of the dynamic circuit. A delay circuit of a static type is provided to delay the clock signal and generate a delayed clock signal. The delayed clock signal initiates operation of one stage of the dynamic circuit. As a result, the final-operation timing of the dynamic circuit is substantially controlled by the delayed clock signal, thereby matching the operation of the dynamic circuit with the operation of the static circuit, regardless of the power supply voltage.