发明名称 Dynamic random access memory device provided with test circuit for internal refresh circuit
摘要 A dynamic random access memory device is equipped with a test circuit for testing an internal refresh circuit. In a test mode, the content of an internal address counter is supplied to both the row of column address decoders, by which one memory cell disposed on the diagonal in a memory cell array is designated. Further, data is written into the designated memory cell from outside of the memory device, and the data stored in the designated memory cell is then read out to check whether the read-out signal is coincident with the written data.
申请公布号 US4672583(A) 申请公布日期 1987.06.09
申请号 US19840620984 申请日期 1984.06.15
申请人 NEC CORPORATION 发明人 NAKAIZUMI, KAZUO
分类号 G11C29/02;(IPC1-7):G11C7/00 主分类号 G11C29/02
代理机构 代理人
主权项
地址