发明名称 Barrier emitter transistor
摘要 A bipolar transistor, and a corresponding method for its fabrication, in which the injection efficiency, and therefore the common emitter current gain, is greatly increased without significant increase in the emitter resistance of the transistor. An emitter tunneling barrier is formed within the emitter region of the transistor, rather than at the junction between emitter and base regions, and the emitter region adjacent to the barrier is heavily doped. The heavy doping of the emitter results in an increased injection efficiency, but the barrier is thin enough to preclude any significant increase in emitter resistance. The disclosed device is a silicon transistor and the barrier material is either silicon dioxide or semi-insulating polycrystalline silicon (SIPOS), sandwiched between emitter layers of heavily doped polycrystalline silicon material.
申请公布号 US4672413(A) 申请公布日期 1987.06.09
申请号 US19840600709 申请日期 1984.04.16
申请人 TRW INC. 发明人 GARDNER, NEAL F.
分类号 H01L29/08;(IPC1-7):H01L49/02;H01L29/161 主分类号 H01L29/08
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