Reduced power/temperature controlled TTL tri-state buffer utilizing three phase splitter transistors

摘要

A tri-level buffer circuit includes three phase splitter bipolar transistors. The buffer circuit consumes less power in the tri-state mode than in the low logic state by reducing the amount of current drawn through the tri-state control line. The buffer circuit incorporates a temperature-controlled current source which supplies a greater amount of current at a low temperature and supplies a smaller amount of current at a high temperature.