| 摘要 |
PURPOSE:To easily change a reading data address while continuing the processing operation of a CPU by holding data in a specified address by a data address specifying part when an error is generated in an arithmetic and control unit. CONSTITUTION:The data address specifying part 1e is arranged in a program debugging device 1 and is capable of previously specifying the address of data to be the cause of an error to be recorded in the arithmetic and control unit at the generation of the error and an error data holding part 4j is arranged in the unit 4 and holds the data of an address specified by the specifying part 1e at the generation of an error in the arithmetic and control unit. Consequently, it is unnecessary to form a complex interrupt processing program newly to recede data to be the cause of an error at the generation of the error in the arithmetic and control unit up to the analysis of the error and the reading data address can be easily changed while continuing the processing operation of a CPU.
|
