发明名称 TEST CIRCUIT
摘要 PURPOSE:To obtain a circuit capable of being constituted of the reduced number of elements, by providing a circuit inputting the data of one word and making the same decremental from the lowermost rank to the uppermost rank and taking AND of all of the exclusive logical results of the output of said circuit to output selection data. CONSTITUTION:For example, when the output of a decoder is constituted of 5 bits, outputs O5-O1 of the decoder are respectively set to 01000. Whereupon, the outputs CA5-CA1 of a decrement circuit 11 comes to 1000 and the outputs CB1-CB5 of a decrement circuit 10 comes to 0111 and the selection data S from a test output generating circuit 12 comes to '1' to show that only one output is normally selected. Next, when the outputs O5-O1 of the decoder are respectively set to 01100, the output CA5-CA1 of the decrement circuit 11 come to 1100 and the outputs CB1-CB5 of the decrement circuit 10 come to 0111. Therefore, selection data S comes to '1' and two or more of outputs of the decoder are selected to show abnormality.
申请公布号 JPS62126366(A) 申请公布日期 1987.06.08
申请号 JP19850266417 申请日期 1985.11.26
申请人 NEC CORP 发明人 IWATA TOSHIYOSHI
分类号 H01L21/822;G01R31/28;H01L21/66;H01L27/04 主分类号 H01L21/822
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