| 摘要 |
PURPOSE:To speed up processing by detecting simulation instructions in a program area in a storage area, executing corresponding instructions in a hardware area, and suppressing interrupting mechanism during the execution period. CONSTITUTION:A storage device 2 is divided into a hardware area 201 and a program area 202, and a program processor 1 is provided with an instruction fetching circuit 100, address converting circuit 103, executing circuit 104, mode control circuit 101, and interruption control circuit 102. When a special instruction in the area 202 during a program run is detected by a decoding circuit 305, the circuit 101 which is informed of the detection generates and reports a program address in the area 201 to be simulated to the circuit 103, and sets a mode flip-flop (FF) to inform the circuit 102 of that; and the completion of the instruction is detected by the circuit 104 and reported to the circuit 101 to reset the FF. |
