| 摘要 |
PURPOSE:To obtain a memory system having the desired capacity together with a high access without increasing the number of terminals, by forming a memory with a memory array of plural blocks to allocate the input to each block in time division and to deliver the output from each block in time division. CONSTITUTION:The addresses supplied from an address terminal 10 are fetched by memory blocks 1 and 2 in terms of time series according to each load address strobe signal RAS and column address strobe signal CAS. The write signal WE is set at '0' in the starting periods of CAS 1 and 2. Under such conditions, the input Din is fetched and written to both blocks 1 and 2. Then the inputs Din are read out successively from both blocks 1 and 2 via a selector 4 in terms of time series.
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