发明名称 PACKAGE FOR MOUNTING SEMICONDUCTOR ELEMENT
摘要 <p>PURPOSE:To mount a semiconductor element with a large number of input/ output terminals at low cost in a short time by forming bumps for electric connections to the semiconductor element ono a plurality of leads shaped to the back from the surface of a package substrate. CONSTITUTION:Bumps 4 are formed to pads 7 corresponding to input/output terminals for a semiconductor element 1 loaded on a package substrate 2 for a pin grid array 6. Plating 9 is executed for increasing adhesion onto a conductor 11, to which the pads 7 are shaped, on the package substrate 2 onto the conductor 11, a metallic layer 10 for preventing a diffusion in order to obviate the diffusion of a bump metal is formed onto plating 9, and the bumps 4 are shaped by gold called the so-called bump metal and solder onto the layer 10. The pin grid array 6 can be mounted while the back of the semiconductor element 1 is joined directly with the pad 4 in the loading section 8 of the semiconductor element 1.</p>
申请公布号 JPS62124748(A) 申请公布日期 1987.06.06
申请号 JP19850263996 申请日期 1985.11.25
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 TAKAMI SHIGENARI;IRIE TATSUHIKO
分类号 H01L21/60 主分类号 H01L21/60
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