| 摘要 |
The invention relates to an elementary shift register. This register includes n latchable flip-flops connected in series, shift control means 9 connected to clock inputs 10, 11, 12, 13 of the flip-flops in order to apply shift control pulses I1, I2, I3, I4 to them. The shift control means 9 comprise a shift clock having n outputs connected respectively to the clock inputs of the n flip-flops, the clock delivering, for each shift, n pulses fixing the period T for shifting the contents of the register by one position; these pulses are applied respectively to the clock inputs of the flip-flops during each period; the n pulses are labelled from position 1 to position n and shifted by T/n, each clock pulse received by a flip-flop provoking a single transfer of a bit stored by this flip-flop to another flip-flop of the series. Application to high-capacity shift registers. <IMAGE>
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