发明名称 HIGH SPEED CHANNEL
摘要 PURPOSE:To obtain a channel of low power consumption and low cost without requiring many waveform compensating circuits by providing a waveform distortion compensating means that compensates the waveform distortion generated in the channel between optional switch steps. CONSTITUTION:Waveform distortion compensating circuits 109, 110, 111, 112 are provided between a secondary switch 405 and a tertiary switch 408. For instance, when a path from an incoming line 413 to an outgoing line 419 is looked at, the waveform distortion compensating circuit 112 compensates the waveform distortion between the incoming line 413 and the outgoing line 100 of a grid switch 404. Waveform distortion compensating circuits 309-312 are optimal designed for bit rate of 100Mb/s, and 323-326 are for 800Mb/s. Thus, a waveform distortion compensating circuit corresponding to respective signal speed can be selected at the time of path selection.
申请公布号 JPS62123889(A) 申请公布日期 1987.06.05
申请号 JP19850264338 申请日期 1985.11.22
申请人 NEC CORP 发明人 NAGASHIMA KUNIO
分类号 H04Q11/04;H04Q3/52 主分类号 H04Q11/04
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