发明名称 LOGIC ANALYSIS METHOD AND APPARATUS
摘要 PURPOSE:To enable speedy measurement tree from errors, among set-up time and hoed time measurements, by comparisons of them with each preceding values and repeating measurements with the smaller values always as the standards of comparison. CONSTITUTION:Among data of many channels, set-up counter 20 and hold counter 21 are installed, for the smallest values of the set-up time and that of the hold time of plural conversion points of each data from the specified reference point. And, the values measured before hand are compared with set-up register and hold register contained in counters 20, 21 respectively and the smaller value is detained for subsequent repetitions of measurements for the specified length of period using the value as new set-up time, hold time and thus, the smallest value of the set-up time, hold time can be obtained.
申请公布号 JPS62123362(A) 申请公布日期 1987.06.04
申请号 JP19850262649 申请日期 1985.11.25
申请人 IWATSU ELECTRIC CO LTD 发明人 YOKOYAMA RYUJI
分类号 G01R13/28;G01R13/20;G01R31/28;G04F10/04 主分类号 G01R13/28
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