| 摘要 |
<p>PURPOSE:To use a PLL inferior in response by forming a signal in such a manner that a synchronizing signal in a vertical synchronizing signal part of the synchronizing signals taken out from a video composite signal has the same cycle as a horizontal synchronizing signal, and using the result for the PLL. CONSTITUTION:The synchronizing signal is separated from the video composite signal A in a synchronization separating circuit 20, a pulse signal B is outputted during a rise time of the synchronizing signal by a monostable multivibrator 21 and supplied to one input of an AND circuit 22. When a signal from an inverter 24 is supplied to the other input, a monostable multivibrator 23 outputs a pulse signal D with a prescribed duration. Since this pulse signal D is inverted in the inverter 24 and inputted to the AND circuit 22, the AND circuit 22 cannot operate during outputting the pulse signal D and checks the signal B. Namely, the vertical synchronizing part of the video composite signal A has equalizing pulses checked ever other interval by the pulse signal D and the cycle of a pulse signal C from the AND circuit 22 is equal and the same as the cycle of the horizontal synchronizing signal.</p> |
