发明名称 |
BIPOLAR TRANSISTOR INTEGRATED CIRCUIT |
摘要 |
PURPOSE:To improve the performance of ECL without variations sufficiently reducing the emitter resistance of switching transistors by a method wherein a third transistor is arranged adjoining a first and a second transistors in the orthogonal direction to the arrayal direction of the latters. CONSTITUTION:A third transistor Qc for power supply is formed into a rectangular pattern adjoining a first and a second transistors Qa, Qb in the orthogonal direction to the arrayal direction of the latters. These transistors are composed of GaAs or AlGaAs wafers epitaxially grown into multiple layers on a semiinsulating GaAs substrate 1. The epitaxial wafers thus grown are used to form P<+> type outer base layers 6(6a-6c) by Mg ion implantation to be element-separated later. Finally an element-separated insulating layer 91 reaching the substrate 1 is formed by H<+> ion implantation while another element- separated insulating layer 92 reaching the first semiconductor layer 2 is formed by B<+> ion implantation. |
申请公布号 |
JPS62122166(A) |
申请公布日期 |
1987.06.03 |
申请号 |
JP19850261847 |
申请日期 |
1985.11.21 |
申请人 |
TOSHIBA CORP |
发明人 |
KATO RIICHI;KURATA MAMORU |
分类号 |
H01L27/082;H01L21/8222;H01L27/06 |
主分类号 |
H01L27/082 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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