| 摘要 |
PURPOSE:To reduce the reduction of generation of overflow in an arithmetic circuit by storing m-set of product while dividing them into positive/negative values and accumulating the result of the read of positive/negative values and accumulating the result of the read of positive/negative products one by one each sequentially and adding them so as to avoid the consecutive products of the same sign. CONSTITUTION:A data to be operated it set to an A register 1 and a B register 2 from a data bus 7 or an instruction/constant ROM 5. An arithmetic circuit 3 uses a data in the A register 1, the B register 2 and a D register 4 to apply the required operation and the result of operation is generated in the D register 4. A RAM 8 consists of two areas ARAM, BRAM and the result of the operation in the arithmetic circuit 3is reserved while it is divided into positive and negative values. An instruction decoder 6 decodes an instruction read from the instruction/constant ROM 5 and gives it to a required part via the data bus 7. Thus, the consecutive addition of the products of the same sign is avoided and then the overflow of the arithmetic circuit is reduced.
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