发明名称 DYNAMIC RAM
摘要 PURPOSE:To precisely evaluate a memory RAM by impressing a bias voltage through a switching FET so as to change the capacity of an information memory MOS. CONSTITUTION:When a signal L is impressed on the gate of the switching FET Q58 in a voltage generator circuit through a probe electrode P1, the FET Q58 is turned off. Then a desired bias voltage is supplied through an other electrode P2, and the capacity of the information memory MOS freely changes. A RAM cell with characteristic variance is evaluated in the most suitable way, and the memory RAM can be precisely evaluated.
申请公布号 JPS62121995(A) 申请公布日期 1987.06.03
申请号 JP19850261154 申请日期 1985.11.22
申请人 HITACHI LTD 发明人 SATO KATSUYUKI;KAWAMOTO HIROSHI;YANAGISAWA KAZUMASA
分类号 G11C11/401;G11C11/404;G11C11/4074;G11C29/00;G11C29/50 主分类号 G11C11/401
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