发明名称 |
Semiconductor device including protecting MOS transistor. |
摘要 |
<p>A zero-cross thyristor comprises an n-type substrate region (l05) surrounded by a p-type region (l06), a p-type base region (l03) formed in the n-type substrate region and surrounding an n-type inner region (l05′) of the n-type substrate region, and a p-type floating region (ll0) formed in the n-type inner region. An n-channel MOS transistor whose gate is connected to the floating region (ll0) is formed in the p-type base region (l03). A first p⁺-type diffusion region (lll) whose depth is less than that of the p-type base region is continuously formed in the p-type base region and the n-type inner region and a second p⁺-type diffusion region (ll2) whose depth is also less than that of the p-type floating region (ll0). The distance between the first and second diffusion regions is set to a predetermined value for preventing the breakdown of the gate insulating layer of the MOS transistor. </p> |
申请公布号 |
EP0224091(A1) |
申请公布日期 |
1987.06.03 |
申请号 |
EP19860115431 |
申请日期 |
1986.11.07 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
YAKUSHIJI, SHIGENORI C/O PAT. DIV. TOSHIBA K.K.;JITSUKATA, KOUJI C/O PAT. DIV. TOSHIBA K.K. |
分类号 |
H01L27/02;H01L27/07;H01L29/06;H01L29/74;H01L29/747;H01L29/749;H01L31/111;(IPC1-7):H01L29/06;H01L31/10;H01L27/06;H01L29/90;H01L29/743 |
主分类号 |
H01L27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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