发明名称 Distributed bit integrated circuit design in a non-symmetrical data processing circuit
摘要 The present invention relates to construction of nonsymmetrical N bit parallel data processing circuits using a plurality of identical integrated circuits chips. In such nonsymmetrical structures it is often impossible to provide a design employing identical integrated circuit chips using conventional techniques. The structure is first divided into single bit slices. These single bit slices are then examined to determine the number of each differing single bit type. A common divisor M is sought for the entire set of B(I)'s, where B(I) is the number of bits of the I-th type. A partial structure is formed in which B(I)/M of each I-th bit type is provided. The number M identical integrated circuits of this partial structure are formed. Lastly, these identical integrated circuits are interconnected to form the whole structure desired. In the event such a common divisor M is not found, the B(J)'s are adjusted by subtraction from a subset bit type and addition to a superset bit type which includes all of the structures of the subset bit type. When the integrated circuits are interconnected the redundant circuits are not connected. This technique advantageously reduces the number of custom integrated circuits needed to construct a nonsymmetrical structure thus reducing design and tooling costs while increasing the volume of the identical integrated circuits thus reducing the costs of these integrated circuits.
申请公布号 US4670846(A) 申请公布日期 1987.06.02
申请号 US19840605753 申请日期 1984.05.01
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 LAWS, GERALD E.
分类号 G06F15/78;(IPC1-7):G06F15/06 主分类号 G06F15/78
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