Frequency synthesizing circuit

摘要

In a frequency synthesizing circuit the deviation of the frequency of an oscillator signal which is transmitted (at 7) by a measuring gate (79) from a desired frequency (output 47) is converted into a control signal (at 3) for the oscillator (11). In order to prevent the occurrence of an average frequency-deviation due to a continuous change of the phase relationship between a test pulse (m) controlling the measuring gate (79) and the oscillator signal, an additional pulse (output 83 or 85) is added (via 81) to the output signal of the measuring gate (79). This additional pulse must occur contiguous to the test pulse. (FIG. 1).