发明名称 ECHO ERASING EQUIPMENT
摘要 PURPOSE:To improve the erasing performance and the talking quality by providing a storage circuit storing a transfer function of plural echo paths and a means combining pseudo echo paths in interlocking with a gain of each microphone. CONSTITUTION:A training signal source 5 is operated at first prior to the start of talking, a gain alpha1 of a gain adjusting circuit 101 is set to '1', gains alpha2-alphan of gain adjusting circuits 102-10n are set to '0', an estimate circuit 6 obtains an estimated sample string of an impulse response of the echo path from a speaker 2 to a microphone 91 and the result is stored in a storage circuit 121. The gain alphaj of a gain adjusting circuit 10j varies in response to a level of an object signal Vj(t) entering each microphone 9j after the start of talking. The gain of the gain adjusting circuit 10j is interlocked equally with the gain of a gain circuit 13j. Thus, in giving an output of an adder 14 as a coefficient of an FIR filter of a pseudo echo path (FIR filter) 7, the pseudo echo path (FIR filter) 7 following momentarily the change in the gains alpha1-alphan of he microphone is obtained.
申请公布号 JPS62120734(A) 申请公布日期 1987.06.02
申请号 JP19850259825 申请日期 1985.11.21
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KOIZUMI NOBUO;OIKAWA HIROSHI
分类号 H04B3/23 主分类号 H04B3/23
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