发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To apply stable voltage controlled oscillation over a wide range even when a power voltage of a PLL is a low voltage by providing a boosting means between a phase comparison means and a voltage controlled oscillation means so as to apply a large DC voltage to the voltage controlled oscillation means. CONSTITUTION:An output voltage e1 of a tank circuit 231 is boosted to a large voltage e2 by a boosting means being a transformer 233, rectified by a rectifier circuit 235, its rectified signal 237 is smoothed through a low-pass filter 239 to obtain a DC voltage signal 221. A voltage controlled oscillator VCO 223 consists of, e.g., a varactor diode and its capacitance is controlled variably in response to a DC voltage of the DC voltage signal 221. Thus, an oscillated output frequency fout of the output signal 225 of the VCO 223 is controlled. Then even when a low voltage supply is used for the PLL power supply, the DC control voltage 221 sufficiently for the voltage controlled oscillation of the VCO 223 properly over a wide range is obtained.
申请公布号 JPS62120721(A) 申请公布日期 1987.06.02
申请号 JP19850260531 申请日期 1985.11.20
申请人 FUJITSU LTD 发明人 TANIGUCHI YOSHIHIKO;SHINODA RYOICHI;SHIMIZU KAZUO;SUZUKI NORIYUKI;NAKAMOTO KATSUHIKO
分类号 H03L7/093;H03L7/06 主分类号 H03L7/093
代理机构 代理人
主权项
地址