发明名称 ERROR CORRECTION METHOD AND APPARATUS
摘要 <p>A random multi-error correcting code having a maximum length block in a packet, for instance, a majority logic decodable (272, 190) shortened difference set cyclic code is used for the error correction in a character code broadcasting system. The error correcting ability of this code is increased. If errors cannot be corrected, the leading bit is shifted, so that more than 8-bit errors is to be corrected. Also, the correction is made by decreasing the threshold value, so that the error correcting ability is improved. Framing timing extraction circuit and a phase lock circuit for the framing timing are eliminated, so that a load of the hardware is reduced. Preferably, the error correcting code is superposed on the television signal during a vertical blanking period.</p>
申请公布号 CA1222558(A) 申请公布日期 1987.06.02
申请号 CA19860513552 申请日期 1986.07.10
申请人 发明人
分类号 H04N7/08;(IPC1-7):H04N7/08 主分类号 H04N7/08
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