| 摘要 |
PURPOSE:To improve the transmission efficiency with a simple circuit by using an ineffective block as a staff synchronizing signal, and inserting a special code disturbing a prescribed coding rule at the final bit, and having a data change into the block to decrease the speed increase in a signal through the transmission line. CONSTITUTION:A signal in a first-in first-out buffer memory 1 is read by a clock of fb/n, a part of data Dn is subject to D(n+1) by a NOT circuit 2 and sent to a selector 4 as an nB1C code shown in figure A and formed into a serial signal by a clock of fo/(n+1) of a frequency divider 6 by a multiplex circuit 5. Since the clock has a faster speed than that of the clock fb, the clock goes faster as shown in figure B in comparison with the clock in figure A, and when the data quantity in the memory 1 is decreased to a prescribed quantity or below, the level of an output Q of an FF 8 is brought into '1' to inhibit the read, '0' is outputted to the selector 4, an output from a special code generator 3 is selected as a staff block and sent to the circuit 5. A data in n-bit having a data change of >=1 time and a data of (n+1)-bit where the n-th bit and the (n+1)-th bit have the same sign are sent from the generator 3. |
