| 摘要 |
PURPOSE:To allow a signal processor to manage a packet handler directly by providing a processor used exclusively for the identification of an SAPI so as to cope with the increase in the assignment of the SAPI further without change of an LAP-D termination circuit through the change in the firm of the SAPI management processor only. CONSTITUTION:A D-channel 1 of an ISDN is terminated by the LAP-D termination circuit 2 to control a layer 2. In writing the information of the SAPI and the layer 3 in a dual port memory 4, the SAPI management processor 12 accesses the memory to read it via buses 5, 11 and when the value of SAPI is '16', the information of the layers 3 and over is written in a dual port memory 7, read in the packet handler 9 and connected to a packet network as a packet. On the other hand, when the value of the SAPI is other than '16', the control information of a time division switch in the memory 4 is given to the signal processor 15. The information is sent to the switch control circuit via a local bus 10. Further, the transfer in opposite direction is executed similarly.
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