| 摘要 |
PURPOSE:To attain access to a main storage at a high speed by allocating a CPU or a channel processor CHP to a proper main storage controller MCU containing a priority circuit, a busy flag circuit, etc. CONSTITUTION:For instance, a main storage access request given from a CPU 16, etc. is received by a port A of a MCU 14 and at the same time a part of the access request corresponding to a bank is receive by a port B of a MCU 15. Then the corresponding main storage devices 10-13 receive successively the accesses via a priority circuit 143 of the MCU 14. At the same time, access is given to the same bank via the MCU 15 that works with an exclusive clock when the contents of a busy flag circuit 144 are not equal to H. The same operation is carried out for other CPUs 17-19 and CPHs 20 and 22, that is, these CPUs and CHPs are allowed to correspond clearly to both MCUs 14 and 15 that can give access to devices 10-13 respectively. As a result, high- speed access is possible for a main storage in accordance with the priority.
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