发明名称 DYNAMIC BUFFERING SYSTEM FOR RECEPTION DATA
摘要 PURPOSE:To finish the issuing frequency of a receive macroinstruction done by an applied program at once by securing such constitution where a communication access processing part performs a writing action on its own buffer area and sets a data input area of the applied program in response to the scale of reception data. CONSTITUTION:The reception data given from a terminal 1 is written on its own buffer area 9 via a communication access processing part 6 of a data processor 5. The scale of the reception data can be easily known. Then a data input area 11 is set most properly to a user area 10 in accordance with the scale of the reception data. The data given from the terminal 1 are written on the area 11 just with a single receive macroinstruction given from an applied program 7.
申请公布号 JPS62120558(A) 申请公布日期 1987.06.01
申请号 JP19850260859 申请日期 1985.11.20
申请人 FUJITSU LTD 发明人 INAHO OSAMU
分类号 H04L29/02;G06F13/00;H04L13/00;H04L13/08 主分类号 H04L29/02
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