发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To operate a semiconductor memory at high speed and to improve the reliability by decreasing the thickness of an N<-> type epitaxial layer only in a memory cell to increase a junction capacity between the base and the collector of the cell. CONSTITUTION:When an N<+> type buried layer 2 is formed on a P<-> type substrate 1, an N<-> type epitaxial layer 3 is formed thereon, a peripheral circuit S is masked with a resist, and only a memory cell M is selectively oxidized and etched, the thickness of the layer 3 can be reduced as compared with the circuit S. Thus, when an N-type impurity is floated from the layer 2, a junction capacity between the base 6c and the collector 6a of a memory cell M increases to endure against information inversion of the memory cell due to alpha-ray to provide high reliability. It can also prevent the margin of the width of the cell from decreasing, provide high resistance against a software error, and operate at high speed. Since the N<-> type epitaxial layer of the circuit S is thick, a junction capacity between the base and the collector decreases to operate at high speed.
申请公布号 JPS62120073(A) 申请公布日期 1987.06.01
申请号 JP19850261686 申请日期 1985.11.20
申请人 MITSUBISHI ELECTRIC CORP 发明人 SHIOMI TORU;KAYANO SHINPEI;NAKASE YASUNOBU;ANAMI KENJI
分类号 H01L21/8229;G11C11/41;H01L27/10;H01L27/102 主分类号 H01L21/8229
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