发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 PURPOSE:To reduce remarkably probability of occurrence of a soft error, especially, of a bit line mode by adding newly a transistor for precharging in a cell array. CONSTITUTION:Transistors TR13-TRn3 for precharging are added near the middle according to the resistance of a bit line as a countermeasure against soft error of bit line mode. That is, to remove the influence of alpha-ray made incident to a bit contact part before precharge pulse turns off, a line consisting of transistors for precharging is added in a cell array A to divide the bit line or lower resistance apparently. Thereby, probability of occurrence of a soft error of the bit line mode goes to small.
申请公布号 JPS62119790(A) 申请公布日期 1987.06.01
申请号 JP19850258462 申请日期 1985.11.20
申请人 FUJITSU LTD 发明人 ANDO TOMOSHI
分类号 G11C11/409;G11C11/34 主分类号 G11C11/409
代理机构 代理人
主权项
地址