| 摘要 |
PURPOSE:To improve the reliability of a memory by making the width of an incorrectable wiring 140% or more of the minimum width of a correctable wiring in a semiconductor memory device wherein if the data read from a memory cell array has an error, the error is corrected by detection and correction circuits and sent out. CONSTITUTION:Before a wiring is provided in a memory with an error correction circuit, the width of the wiring of the circuit which can be saved by the correction circuit is made minimum. On the other hand, the width of the wiring of the circuit which cannot be saved is made wider, greater capacity and higher integration and even if the wiring has a disconnection, it can be saved by the correction circuit. If the width of a wire is reduced, the probability of the disconnection increases and if the saving is possible by the correction circuit, the probability can be reduced equivalent so the point where these are offset can be made as a minimum wire width ratio. In order to satisfy this, the minimum wire width of the wiring which cannot be corrected by the correction circuit is provided 140% or more. |
